| Organic Thin-Film Transistors |
|
Introduction The most common type of transistor in use today is known as the field-effect transistor, or FET. An FET relies on an electric field to control the conductivity of a 'channel' of one type of charge carrier in a semiconductor material. A thin-film transistor (TFT) is a special kind of FET made by depositing thin films material on top of one another in a layered configuration known as the stack. Architecture The TFT is a three terminal device composed of a source, drain, and gate electrodes, a dielectric (insulating) layer, and a semiconducting layer: 
TFT Architecture
Essentially the transistor is an electronic valve or switch where the current flow between the source and drain electrodes is controlled by the magnitude of the or electric field applied at the gate, known as the gate bias. The charge flow in the transistor channel can be dominated by holes (positive charges) or electrons (negative charges) which define whether the semiconductor is p-type or n-type, respectively. A common substrate on which to build OTFTs is glass, since the primary current application of TFTs is in liquid crystal displays, though with increasing demand for flexible electronics, plastics such as PET are becoming more common. This differs from the conventional FET, where the semiconductor material - such as silicon - typically is the substrate. In OTFTs, there are four common different configurations, or architectures, that are commonly used, as determined by the relative location of the gate and the source and drain within the material stack:
Top Gate, Top-Contact TFT
Top-Gate, Top-Contact (TGTC), in which the gate is farthest away from the substrate (i.e. the last layer to be applied), and the source and drain are placed at the top of the dielectric-semiconductor interface.
Top Gate, Bottom Contact
Top-Gate, Bottom-Contact (TGBC), where the gate is still the outer-most layer, but now the source and drain are adjacent to the semiconductor-substrate interface.
Bottom Gate, Bottom Contact
Bottom-Gate, Bottom-Contact (BGBC). Here the gate is embedded within the dielectric atop the substrate, and the source and drain again at the semiconductor-dielectric interface.
Bottom Gate, Bottom Contact
Bottom-Gate, Top-Contact (BGTC). Here the gate position remains the same, but the source and drain are now applied on top of the semiconductor layer.
The choice of device architecture often has real consequences, with each architecture having its pros and cons. For example, TGBC devices offer a large injection-face (i.e. the surface from which the charge-carriers leave the source and enter the semiconductor). However, for processing reasons, BGBC has may be preferred, since the application of the semiconductor layer as the last one has historically been seen as the easiest to produce, since the semiconductor layer does not have to be exposed to the potentially-damaging chemicals needed to process subsequent layers.
Performance The two most important transistor performance parameters are the charge carrier mobility (u, how fast holes or electrons moves) and the current on-off ratio (Ion:Ioff, how efficient the current can be modulated by the source-gate bias). Furthermore in order to maximize the transistor speed, the carrier mobility should be as high as possible and the distance between the source and drain electrodes (channel length) should be as small as possible. When evaluating the performance of an OTFT device, there are three main parameters to consider:
Applications OTFTs can be used for a wide variety of applications, including display backplanes and integrated circuits for lighting, sensors, RFID tags, and any application where logic circuitry is used. Learn more. CMOS Circuits In applications today, the most common OTFTs are made with p-type semiconductor materials, as historically p-types have demonstrated far superior performance. However, with the recent substantial advances in n-type semiconductors, it is now possible to create circuits using both p- and n-type transistors in a configuration known as CMOS. CMOS is the circuit configuration most widely used in conventional electronics, and results in circuitry that is easier to design, cheaper to produce, and more energy-efficient. Learn more.
Challenges Despite all the progress made in OTFT technology - especially the advent of high-performing n-type materials to enable CMOS circuits - significant challenges still remain:
Material Mobility. The carrier mobility of printable semiconductors is at least two orders of magnitude lower than crystalline inorganic materials. Feature Resolution. The typical resolution for the OFET channel length (L) in printed devices is larger than traditional inorganics by the same order of magnitude. For both these reasons OFET circuit speeds cannot compete with those based on silicon or GaAs and fabricated using photolithographic processes. However, when the performance requirements are relaxed and/or there are the needs for additional device functions (eg, flexibility, easy integration) and/or to reduce costs, OFETs may become very competitive. Shelf- and Operational Lifetime. Although substantial progress is being made, the stability of these organic materials both on the shelf and in performing devices is still not sufficient for many applications. Particularly challenging is the area of OLED display backplanes, where even slight degradation of material performance can result in changes in pixel brightness easily detected by the human eye. |
